In order to desensitize performance of CMOS amplifier circuits with respect to variation in their supply voltages, the amplifier circuits can be designed so that their quiescent current stays constant over a range of supply voltages, or so that the quiescent current is proportional to temperature (PTAT). However, in some applications, the performance of the amplifier can still be sensitive to the supply voltages. For example, a CMOS power amplifier biased with constant quiescent current, Idq, can have an output power that may change based on a variation of the supply voltage, Vdd. This is because, as known to a person skilled in the art, the output power, Pout, remains dependent on the supply voltage according to the equation:Pout˜((Vdd−Vknee)^2)/(2*Rload),so, as Vdd changes, the output power, Pout, also changes given that the load, Rload, is fixed. It follows that there is a desire to either eliminate or reduce variation of the output power, Pout, with respect to variation of the supply voltage.
In cases where a constant envelope radio frequency (RF) signal is desired to be amplified, output power to an amplifier can be provided by way of a low dropout (LDO) regulator whose pass device (or devices) conducts power to the amplifier. In cases where the amplifier, for example, a power amplifier, is a stacked amplifier comprising a plurality of series connected transistors, the pass device is coupled to a drain of an output transistor of the stacked amplifier, to provide a desired voltage at the drain commensurate with a desired output power of the stacked amplifier. Such scheme is used, for example, in a GSM (Global System for Mobile communication) amplifier (e.g. power amplifier), where an LDO regulator with a PMOS pass device coupled to the drain of the output transistor controls the output power of the amplifier. Since such GSM amplifier can draw in excess of 2 amps during a burst of the output power, the PMOS pass device must be sized for very low ON resistance to prevent the LDO regulator from saturating and causing an IR drop (i.e. voltage drop across the ON resistance) which would drop the output power and make the power control inaccurate. For this reason, the PMOS pass device is usually extremely large, which results in higher die size and cost. It follows that there is a desire to either eliminate or reduce the size of the LDO regulator.